Pipeline Parallelism › The Pipeline Bubble Problem
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The most important challenge in pipeline parallelism is not communication or memory but time: the problem of stages sitting idle while waiting for work. To understand why this happens, it is worth tracing through exactly what happens when you run a model through a naive pipeline.
Imagine four pipeline stages labeled S1 through S4. A single input mini-batch enters S1 at time step 1. S2 cannot begin until S1 finishes, S3 cannot begin until S2 finishes, and so on. The result is a startup pattern where:
- At time step 1: S1 is working, S2, S3, and S4 are idle.
- At time step 2: S2 is working on the result from S1, while S1 is idle (finished its pass and waiting), and S3 and S4 are still idle.
- At time step 3: S3 is working, while S1, S2, and S4 are all idle.
- At time step 4: S4 is working, while S1, S2, and S3 are all idle.
After the forward pass completes, the backward pass flows in reverse: S4 computes gradients first, then passes them to S3, and so on back to S1. This also creates a sequential chain of idle time, now in reverse order. The combined result is that the startup and teardown phases of the pipeline are almost entirely wasted: at any given moment, only one stage is doing useful work.
A pipeline bubble is the idle time that accumulates across pipeline stages due to the sequential dependency between stages. Bubbles appear at the beginning and end of every micro-batch sequence. For a pipeline with stages, the naive single-batch approach wastes of total device-time on bubbles. With four stages, three-quarters of all device-time is wasted.
To quantify the bubble fraction precisely, consider pipeline stages processing micro-batches. The startup ramp contributes idle time steps before all stages can participate (the first stage begins immediately, but the -th stage cannot begin until time steps have passed because it must wait for activations from earlier stages). The drain phase at the end is symmetric, contributing another idle time steps as gradients move backward through the pipeline. Each stage performs useful operations— forward and backward—and the full schedule lasts time steps. The bubble fraction is therefore:
where:
- : number of pipeline stages (equal to the number of devices)
- : number of micro-batches processed in each pipeline run
- : total idle time slots from the startup ramp and teardown drain
For large , the denominator is dominated by , so the bubble fraction approaches , which converges to zero as grows. This asymptotic behavior is the key insight: the bubble overhead becomes negligible when is much larger than .
To see this concretely with numbers: for stages and micro-batch, the bubble fraction is . You are paying for four GPUs but using only about 25% of their combined compute capacity. Increasing to 8 micro-batches brings the bubble fraction to . Increasing to 32 micro-batches brings it to . The improvement continues, but each additional doubling of produces diminishing returns: going from to reduces the bubble from about 9% to about 4.5%.
It is worth understanding why the bubble cannot be eliminated entirely with any finite number of micro-batches. The startup ramp is unavoidable: the first micro-batch must travel through all stages sequentially before the pipeline can be considered "full." During this ramp-up, early stages are idle after finishing their portion of the first micro-batch and before the second micro-batch arrives. Similarly, the drain ramp at the end is unavoidable: after the last forward pass, backward passes flow back through the pipeline, and late stages finish first while early stages wait for gradients to arrive from later stages. As grows, these fixed startup and drain costs become a smaller fraction of the schedule and approach zero asymptotically.
