Pruning Basics › Measuring the Sparsity-Efficiency Gap
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One of the most important practical lessons when deploying pruned models is the gap between theoretical and realized efficiency. We have seen the accuracy-sparsity tradeoff; let us now examine the sparsity-efficiency gap more concretely.
The theoretical story is appealing: a model with 90% sparsity uses 10% of the non-zero parameters, so it should be roughly 10x smaller and faster. In practice, several obstacles prevent realizing this speedup on standard hardware.
Dense matrix multiply overhead. Standard deep learning frameworks represent weight matrices as dense tensors. A 90% sparse dense tensor occupies the same memory as a 100% dense tensor. When you call model(x) in PyTorch, it calls optimized BLAS routines that multiply every element, including the zeros. The zeros do not get skipped; they produce zero contributions that are added to the accumulator, consuming compute time and memory bandwidth.
Sparse format overhead. Converting to a sparse format (CSR, COO, or block-sparse) introduces representation overhead and complicates the matrix multiply. The sparse multiply must now read the column indices alongside the nonzero values, and the irregular memory access pattern defeats CPU and GPU cache prefetching optimizations. For moderate sparsity (below 90%), sparse matrix multiply can be slower than dense multiply because the overhead of managing the sparse format exceeds the savings from skipping zeros.
Hardware SIMD requirements. Modern CPUs execute matrix multiplications using SIMD (single instruction, multiple data) instructions that process 4, 8, or 16 values in parallel. These instructions require regular, predictable memory layouts. Unstructured sparsity breaks the regular layout, preventing effective SIMD utilization. Structured sparsity preserves the regular layout because entire neurons or rows are removed, not scattered individual elements.
The practical consequence is that unstructured pruning primarily reduces model file size and initial load time, not inference latency, on standard CPU and GPU hardware. For latency-sensitive applications, structured pruning or N:M sparsity on NVIDIA hardware is necessary to achieve real speedups.
import time
def benchmark_inference(model, test_loader, n_runs=50):
model.eval()
with torch.no_grad():
for X_batch, _ in test_loader:
_ = model(X_batch)
break
times = []
with torch.no_grad():
for _ in range(n_runs):
for X_batch, _ in test_loader:
t0 = time.perf_counter()
_ = model(X_batch)
times.append(time.perf_counter() - t0)
break
return np.mean(times) * 1000dense_time = benchmark_inference(model, test_loader)
pruned_time = benchmark_inference(pruned_finetuned, test_loader)Dense model sparsity: 0.0% Pruned model sparsity: 70.0% Dense model inference: 0.055 ms per batch Pruned model inference: 0.057 ms per batch Speedup factor: 0.97x Note: PyTorch dense mm is used for both models. Real speedup requires sparse compute support or structured pruning.
The output confirms the sparsity-efficiency gap: despite 70% of weights being zero, inference time on this dense-format implementation is similar to the baseline. The zeros are being multiplied and added just like any other value. Achieving real speedups requires either converting to a sparse format, using structured pruning so the matrix itself is smaller, or deploying on hardware with native sparse compute support.